vgadb – VGA controller and monitor database|
The VGA database, /lib/vgadb, consists of two parts, the first
describing how to identify and program a VGA controller and the
second describing the timing parameters for known monitors to
be loaded into a VGA controller to give a particular resolution
and refresh rate. Conventionally, at system boot, the program
aux/vga (see vga(8)) uses the monitor type in /env/monitor, the
display resolution in /env/vgasize, and the VGA controller information
in the database to find a matching monitor entry and initialize
the VGA controller accordingly. |
The file comprises multi–line entries made up of attribute/value pairs of the form attr=value or sometimes just attr. Each line starting without white space starts a new entry. Lines starting with # are comments.
The first part of the database, the VGA controller identification
and programming information, consists of a number of entries with
attribute ctlr and no value. Within one of these entries the following
attributes are meaningful:
clock clock generator type. This must match one of the types known internally to aux/vga. Currently ch9294, icd2061a, ics2494, ics2494a, s3clock, tvp3025clock, and tvp3026clock are recognized.
hwgc hardware graphics cursor type. This must match one of the types known to /dev/vgactl and internally to aux/vga. Currently ark200pvhwgc, bt485hwgc, clgd542xhwgc, clgd546xhwgc, ct65545hwgc, cyber938xhwgc, hiqvideohwgc, mach64xxhwgc, mga2164whwgc,
linear Whether the card supports a large (>64kb) linear memory window. The value is either 1 or 0 (equivalent to unspecified). The current kernel graphics subsystem requires a linear window; entries without linear=1 are of historic value only.
link This must match one of the types known internally to aux/vga. Currently vga and ibm8514 are recognized. The type vga handles generic VGA functions and should almost always be included. The type Ibm8514 handles basic graphics accelerator initialization on controllers such as the early S3
The functions internal to aux/vga corresponding to the clock, ctlr, link, and ramdac values will be called in the order given for initialization. Sometimes the clock should be set before the RAMDAC is initialized, for example, depending on the components used. In general, link=vga will always be first and, if appropriate, link=ibm8514 will be last.
The entries in the second part of /lib/vgadb have as attribute
the name of a monitor type and the value is conventionally a resolution
in the form XxY, where X and Y are numbers representing width
and height in pixels. The monitor type (i.e. entry) include has
special properties, described below and shown in
the examples. The remainder of the entry contains timing information
for the desired resolution. Within one of these entries the following
attributes are meaningful:
ehb end horizontal blanking, in character clocks.
ht horizontal total, in character clocks.
vrs vertical refresh start, in character clocks.
vre vertical refresh end, in character clocks.
vt vertical total, in character clocks.
hsync horizontal sync polarity. Value must be + or –.
vsync vertical sync polarity. Value must be + or –.
interlace interlaced mode. Only value v is recognized.
alias continue, replacing the alias line by the contents of the entry whose attribute is given as value.
include continue, replacing this include line by the contents of the previously defined include monitor type with matching value. (See the examples.) Any non–zero attributes already set will not be overwritten. This is used to save duplication of timing information. Note that value is not parsed, it is only
Basic ctlr entry for a laptop with a Chips and Technology 65550
ctlr # NEC Versa 6030X/6200MX
ctlr # Hercules Dynamite Power
include = 640x480@60Hz # 60Hz, 31.5KHz
# Multisync monitors with video bandwidth up to 65MHz.
multisync65 = 1024x768 # 60Hz, 48.4KHz
ndb(2), vga(3), ndb(6), 9boot(8), vga(8)|
Richard E. Ferraro, Programming Guide to the EGA, VGA and Super VGA Cards, Third Edition
The database should provide a way to use the PCI bus as well as
BIOS memory to identify cards.|
ADDING A NEW MONITOR
Adding a new monitor is usually fairly straightforward, as most
modern monitors are multisync and the only interesting parameter
is the maximum video bandwidth. Once the timing parameters are
worked out for a particular maximum video bandwidth as in the
example above, an entry for a new monitor with that limit
# Sony CPD–1304
# Horizontal timing:
# Allowable frequency range: 28–50KHz
# Vertical timing:
# Allowable frequency range: 50–87Hz
ADDING A NEW VGA CONTROLLER
While the use of this database formalizes the steps needed to
program a VGA controller, unless you are lucky and all the important
components on a new VGA controller card are interconnected in
the same way as an existing entry, adding a new entry requires
adding new internal types to vga(8). Fortunately, the unit of
variety has, for the most part, shifted from individual components
to entire video chipsets. Thus in lucky cases all that is necessary
is the addition of another 0xNNNNN= line to the entry for the
controller. This is particularly true in the case of the ATI Mach
64 and the S3 Virge. |
If you need to actually add support for a controller with a different
chipset, you will need the data sheets for the VGA controller
as well as any RAMDAC or clock generator (these are commonly integrated
into the controller). You will also need to know how these components
interact. For example, a common
combination is an S3 86C928 VGA chip with an ICD2061A clock generator.
The ICD2061A is usually loaded by clocking a serial bit–stream
out of one of the 86C928 registers. Similarly, the RAMDAC may
have an internal clock–doubler and/or pixel–multiplexing modes,
in which case both the clock generator and VGA
chip must be programmed accordingly. Hardware acceleration for
rectangle fills and block copies is provided in the kernel; writing
code to handle this is necessary to achieve reasonable performance
at high pixel depths.